Outclk Dividers - 4.1 English - PG198

JESD204 PHY v4.1 Product Guide (PG198)
Document ID
PG198
Release Date
2025-01-30
Version
4.1 English

The divider encodings and DRP address shown in the following table are applicable to all three PLLs available in UltraScale devices.

Table 2-72:      DRP Address Map

DRP Addr (Hex)

DRP Bits

R/W

Attribute Name

Bits

Encoding

DRP Encoding

007C

10:8

R/W

TXOUT_DIV

2:0

1

0

2

1

4

2

8

3

16

4

0063

2:0

R/W

RXOUT_DIV

2:0

1

0

2

1

4

2

8

3

16

4