This chapter includes guidelines and additional information to facilitate designing with the core.
When a JESD204C core is generated, the JESD204 PHY core is instantiated as a stand-alone IP core in the example design provided with the JESD204C IP. In this case, the JESD204 PHY IP top level is available directly for instantiation in designs, and the JESD204 PHY IP GUI is available. This chapter describes using the JESD204 PHY in this mode.