The TXPRBSSEL AND TXOUTCLKSEL registers can be used to configure the TX pattern generator as described in Using TX Pattern Generator.
•There is one TXPRBSSEL and TXOUTCLKSEL register per GT lane. The GT_INTERFACE_SELECTOR register (0x024) must be programmed to set the index of the lane you want to access.
•READ/WRITE access to the GT DRPs is performed using the JESD204_PHY Transceiver DRP control interface. The GT_INTERFACE_SELECTOR register (0x024) must be programmed to set the index of the lane you want to access.
•The TXPRBSSEL registers are used to directly control the TXPRBSSEL inputs on the GTs. See the GT user guide for details of the modes and the required settings for these bits.