SGDMA Descriptor Control Register (0x14) - 4.2 English - PG195

DMA/Bridge Subsystem for PCI Express Product Guide (PG195)

Document ID
PG195
Release Date
2025-05-29
Version
4.2 English
Table 1. SGDMA Descriptor Control Register (0x14)
Bit Index Default Access Type Description
W1S Bit descriptions are the same as in SGDMA Descriptor Control Register (0x10).