Important: This document covers only DMA mode port descriptions. For AXI Bridge mode,
see the
AXI Bridge for PCI Express Gen3 Subsystem Product
Guide (PG194).
The AMD DMA/Bridge Subsystem for PCI Express® connects directly to the integrated block for PCIe. The datapath interfaces to the PCIe integrated block IP are 64, 128, 256 or 512-bits wide, and runs at up to 250 MHz depending on the configuration of the IP. The datapath width applies to all data interfaces except for the AXI4-Lite interfaces. AXI4-Lite interfaces are fixed at 32-bits wide.
Ports associated with this subsystem are described in the following tables.