C2H SGDMA Descriptor Credits (0x8C) - C2H SGDMA Descriptor Credits (0x8C) - v4.2 English - PG195

DMA/Bridge Subsystem for PCI Express Product Guide (PG195)

Document_ID
PG195
Release_Date
2026-07-22
Version
v4.2 English
Table 1. C2H SGDMA Descriptor Credits (0x8C)
Bit Index Default Access Type Description
9:0 10'h0 RW

c2h_dsc_credit[9:0]

Writes to this register will add descriptor credits for the channel. This register is only used if it is enabled through the channel's bits in the Descriptor Credit Mode register.

Credits are automatically cleared on the falling edge of the channels Control register Run bit or if Descriptor Credit Mode is disabled for the channel. The register can be read to determine the number of current remaining credits for the channel.