Serial transceiver transmitter settings are customized by options in the transmitter frame.
• Line rate (Gbps). Enter the transmitter line rate in gigabits per second. The available range depends on transceiver type and can be limited by the selected device.
• PLL type. Select the desired PLL type used to clock the transmitter of each enabled serial transceiver channel. Possible options are QPLL0, QPLL1, and CPLL, but available choices can be limited by the selected device and transmitter line rate. When QPLL0 or QPLL1 is chosen, one or more transceiver common primitives is instantiated. If the transmitter and receiver line rates differ, different PLL types might be required for each data direction.
• QPLL Fractional-N options . For configurations targeting a QPLL in a device which supports the fractional-N feedback divider, enter a Requested reference clock (MHz) value and click the Calc button. This action populates the Actual re ference cl ock (MHz) field with a variety of supported transmitter reference clock frequencies based on the requested value. In most cases, the requested frequency is available for selection. The calculation also populates the Fractional part of QPLL feedback divider field with the numerator of the fractional part of the QPLL feedback divider used to clock the transmitter datapath. This value can be manually tweaked to fine-tune the available Actual re ference cl ock (MHz) selections for advanced use cases. Possible values are 0 through 16777215, where 0 disables fractional-N operation. Changing this field updates the available Actual re ference cl ock (MHz) selections.
• Actual reference clock (MHz). Select the desired frequency, from among all compatible frequencies, for the reference clock that will be provided to the selected PLL type to achieve the selected transmitter line rate.
• Encoding. Select the type of encoding or data format handling you want the transceiver to apply when data is transmitted. The options and their characteristics are as follows, but choices can be limited by selected device, transceiver type, and line rate:
- Raw (no encoding). Data is transmitted as provided.
- 8B/10B. Data is encoded in 8B/10B format before being transmitted.
- Sync. gearbox for 64B/66B. Data is transmitted using the TX Synchronous Gearbox in normal mode for 64B/66B applications.
- Sync. gearbox for 64B/66B (CAUI mode). Data is transmitted using the TX Synchronous Gearbox in CAUI (dual data stream) mode for 64B/66B applications.
- Async. gearbox for 64B/66B. Data is transmitted using the TX Asynchronous Gearbox in normal mode for 64B/66B applications.
- Async. gearbox for 64B/66B (CAUI mode). Data is transmitted using the TX Asynchronous Gearbox in CAUI (dual data stream) mode for 64B/66B applications.
- Sync. gearbox for 64B/67B. Data is transmitted using the TX Synchronous Gearbox in normal mode for 64B/67B applications.
- Sync. gearbox for 64B/67B (CAUI mode). Data is transmitted using the TX Synchronous Gearbox in CAUI (dual data stream) mode for 64B/67B applications.
• User data width. Also known as external data width. Select the desired bit width for the transmitter user data interface of each serial transceiver channel. Possible options are 16, 20, 32, 40, 64, 80, 128, and 160 but available choices can be limited by selected device, transceiver type, line rate, and encoding. This selection sets the active portion of the transmitter data vector, which is presented at full size on the core interface unless the user data width sizing helper block is located within the core. The active portion of the transmitter data vector is least significant bit-aligned. Inactive bits should be tied Low.
• Internal data width. Select the desired bit width for the internal transmitter datapath of each serial transceiver channel. Possible options are 16, 20, 32, 40, 64, and 80, but available choices are limited by selected device, transceiver type, line rate, encoding, and user data width.
• Buffer. Choose whether to enable or bypass the transmitter buffer. The ability to bypass the buffer might be limited by the selected encoding. When the buffer is bypassed, the transmitter buffer bypass controller helper block is provided.
• TXOUTCLK source. Select the internal clock source for the TXOUTCLK port of each serial transceiver primitive. Possible options are TXPLLREFCLK_DIV1, TXPLLREFCLK_DIV2, TXOUTCLKPCS, TXOUTCLKPMA, and TXPROGDIVCLK, but available choices can be limited by selected device, line rate, reference clock frequency, encoding, internal data width, and buffer usage. The transmitter user clocking network helper block is driven by the TXOUTCLK port, and thus by this clock source, of the master transceiver channel. When the TX programmable divider (TXPROGDIVCLK) is selected as the TXOUTCLK source. It is possible to either choose a non-default frequency for that clock or choose a different clock source for the TX programmable divider. Click on the Enable selectable TXOUTCLK frequency option under Advanced clocking when TXPROGDIVCLK is selected as the TXOUTCLK source.