Serial transceiver receiver settings are customized by options in the receiver frame.
• Line rate (Gbps). Enter the receiver line rate in gigabits per second. The available range depends on transceiver type and can be limited by the selected device.
• PLL type. Select the desired PLL type used to clock the receiver of each enabled serial transceiver channel. Possible options are QPLL0, QPLL1, and CPLL, but available choices can be limited by the selected device and receiver line rate. When QPLL0 or QPLL1 is chosen, one or more transceiver common primitives will be instantiated. If the receiver and transmitter line rates differ, different PLL types might be required for each data direction.
• QPLL Fractional-N options . For configurations targeting a QPLL in a device which supports the fractional-N feedback divider, enter a Requested reference clock (MHz) value and click the Calc button. This action populates the Actual re ference cl ock (MHz) field with a variety of supported receiver reference clock frequencies based on the requested value. In most cases, the requested frequency is available for selection, but must be equivalent to the analogous transmitter value if the same QPLL is used for both transmitter and receiver. The calculation also populates the Fractional part of QPLL feedback divider field with the numerator of the fractional part of the QPLL feedback divider used to clock the receiver datapath. This value can be manually tweaked to fine-tune the available Actual re ference cl ock (MHz) selections for advanced use cases. Possible values are 0 through 16777215, where 0 disables fractional-N operation. Changing this field updates the available Actual re ference cl ock (MHz) selections.
• Actual Reference Clock (MHz). Select the desired frequency from among all compatible frequencies for the reference clock that will be provided to the selected PLL type to achieve the selected receiver line rate.
• Decoding. Select the type of decoding or data format handling you want the transceiver to apply when data is received. The options and their characteristics are as follows, but choices can be limited by selected device, transceiver type, line rate, and transmitter data encoding:
- Raw (no decoding). Data is provided as received.
- 8B/10B. Received data is decoded from 8B/10B format.
- Sync. gearbox for 64B/66B. Data is received using the RX Synchronous Gearbox in normal mode for 64B/66B applications.
- Sync. gearbox for 64B/66B (CAUI mode). Data is received using the RX Synchronous Gearbox in CAUI (dual data stream) mode for 64B/66B applications.
- Async. gearbox for 64B/66B. Data is received using the RX Asynchronous Gearbox in normal mode for 64B/66B applications.
- Async. gearbox for 64B/66B (CAUI mode). Data is received using the RX Asynchronous Gearbox in CAUI (dual data stream) mode for 64B/66B applications.
- Sync. gearbox for 64B/67B. Data is received using the RX Synchronous Gearbox in normal mode for 64B/67B applications.
- Sync. gearbox for 64B/67B gearbox (CAUI mode). Data is received using the RX Synchronous Gearbox in CAUI (dual data stream) mode for 64B/67B applications.
• User data width. Also known as external data width. Select the desired bit width for the receiver user data interface of each serial transceiver channel. Possible options are 16, 20, 32, 40, 64, 80, 128, and 160 but available choices can be limited by selected device, transceiver type, line rate, and decoding. This selection sets the active portion of the receiver data vector, which is presented at full size on the core interface unless the user data width sizing helper block is located within the core. The active portion of the receiver data vector is least significant bit-aligned. Inactive bits should be ignored.
• Internal data width. Select the desired bit width for the internal receiver datapath of each serial transceiver channel. Possible options are 16, 20, 32, 40, 64, and 80, but available choices are limited by selected device, transceiver type, line rate, decoding, and user data width.
• Buffer. Choose whether to enable or bypass the receiver elastic buffer. The ability to bypass the buffer can be limited by the selected decoding. When the buffer is bypassed, the receiver buffer bypass controller helper block is provided.
• RXOUTCLK source. Select the internal clock source for the RXOUTCLK port of each serial transceiver primitive. Possible options are RXPLLREFCLK_DIV1, RXPLLREFCLK_DIV2, RXOUTCLKPCS, RXOUTCLKPMA, and RXPROGDIVCLK, but available choices can be limited by selected device, line rate, reference clock frequency, decoding, internal data width, and buffer usage. The receiver user clocking network helper block is driven by the RXOUTCLK port, and thus by this clock source, of either the master transceiver channel or of each transceiver channel (depending on buffer usage options).