I/O Standard and Placement - 1.7 English

UltraScale FPGAs Transceivers Wizard LogiCORE IP Product Guide (PG182)

Document ID
PG182
Release Date
2023-05-17
Version
1.7 English

The example design XDC file creates the following placeholder constraints for general example design top-level I/O. The set_property package_pin and set_property iostandard constraints should be uncommented and assigned to package pins and I/O standards, (replacing "<>") respectively, that are appropriate for your system:

#set_property package_pin <> [get_ports hb_gtwiz_reset_clk_freerun_in]

#set_property iostandard <> [get_ports hb_gtwiz_reset_clk_freerun_in]


#set_property package_pin <> [get_ports hb_gtwiz_reset_all_in]

#set_property iostandard <> [get_ports hb_gtwiz_reset_all_in]


#set_property package_pin <> [get_ports link_down_latched_reset_in]

#set_property iostandard <> [get_ports link_down_latched_reset_in]


#set_property package_pin <> [get_ports link_status_out]

#set_property iostandard <> [get_ports link_status_out]