Designing with the Helper Blocks - 1.7 English

UltraScale FPGAs Transceivers Wizard LogiCORE IP Product Guide (PG182)

Document ID
PG182
Release Date
2023-05-17
Version
1.7 English

The helper block modules provided with the Wizard simplify common or complex transceiver usage. The design and usage guidelines of these helper blocks are presented in the following sections.

Consider the benefits and drawbacks of each choice when deciding whether to locate each helper block within the core or in the example design. The primary benefits of locating a helper block within the core are a simpler, more abstract interface, and that as part of the core, the helper block is also updated if you upgrade the core to a new version. However, the helper block is not accessible for manual modification if different behavior is required for your use case.

The primary benefit of locating a helper block within the example design is that you gain the ability to use it as an example starting point, should connectivity or contents require modification to suit your specific needs. However, because it is not part of the core, the example design must be regenerated and any manual edits must be performed again if you upgrade the core to a new version. AMD cannot guarantee support for modifications made to the example design contents as they are delivered.