The example design XDC file creates package pin constraints for each instantiated transceiver differential reference clock buffer primitive as well as each instantiated differential recovered clock output buffer primitive, if utilized. The constraints reflect the transceiver primitive site locations selected during customization of the Physical Resources tab of the Customize IP dialog box. If you wish to use different physical locations, the correct way to adjust both the location constraints and the wiring between clock buffers, transceiver channel and common primitives is to re-customize the core and select different clock buffer locations, rather than modify the example design XDC file.
Within the example design XDC, two set_property package_pin commands exist per transceiver differential reference clock buffer in the following format. The specific locations and ports are examples only:
set_property package_pin Y5 [get_ports mgtrefclk0_x0y0_n]
set_property package_pin Y6 [get_ports mgtrefclk0_x0y0_p]
Within the example design XDC, two set_property package_pin commands exist per transceiver differential recovered clock output buffer in the following format. The specific locations and ports are examples only:
set_property package_pin T5 [get_ports rxrecclkout_chx0y4_n]
set_property package_pin T6 [get_ports rxrecclkout_chx0y4_p]