Transceiver channel enablement, reference clock source, and recovered clock selections are customized by options in the channel table or channel graphic. The channel graphic is shown on the left side of the Customization dialog box in place of the IP symbol when interacting with Physical Resources tab options. The channel table contains interactive Channel Enable, TX REFCLK source, RX REFCLK source, RXRECCLKOUT buffer column options, and an informative Location details column. Available channels are organized by column and Quad locations. The interactive channel graphic provides the same customization options and aids in visualizing transceiver primitive and reference clocking topology.
• Enabling a channel . To enable a particular transceiver channel for use, either click the corresponding checkbox in the channel table or right-click the channel in the graphic and select Enable . Enabling a channel causes that physical transceiver site to be instantiated, connected, and appropriately constrained in the generated core instance. At least one channel must be enabled at all times; to disable the default channel, first enable the desired channel(s), then disable the default. Click the Disable All Channels button to return transceiver channel enablement to its default state. Transceiver channels are organized by column and Quad, and are named according to their coordinates on the transceiver channel grid. Channels can also be identified by their serial data pins as shown in the Data pins column.
• Choosing a transmitter reference clock source . A valid transmitter reference clock source must be chosen for each enabled channel. You can choose a source from the TX REFCLK column of the channel table or by right-clicking the channel in the graphic. The transmitter PLL type selected during Basic tab customization is shown for reference. Choosing a reference clock source for a channel causes that buffered input to be routed to the channel, and for appropriate constraints to be generated. Each unique reference clock source selected requires a differential clock input to the device.
• Choosing a receiver reference clock source . A valid receiver reference clock source must be chosen for each enabled channel. You can choose a source from the RX REFCLK column of the channel table or by right-clicking the channel in the graphic. The receiver PLL type selected during Basic tab customization is shown for reference. Choosing a reference clock source for a channel causes that buffered input to be routed to the channel, and for appropriate constraints to be generated. Each unique reference clock source selected requires a differential clock input to the device.
Note: The wizard always connects the buffered reference clock signal to the “GTREFCLK0” position of the appropriate PLL clock multiplexer(s) even if MGTREFCLK1 or a reference clock requiring north or south routing is selected. This is a supported simplification use mode, and the Vivado design tools handle the required routing complexity. GTGREFCLK should be used only for testing purposes. For more information on the use of GTGREFCLK, see UltraScale Architecture GTH Transceivers User Guide (UG576) [Ref 1] or UltraScale Architecture GTY Transceivers User Guide (UG578) [Ref 2] .
• Choosing a recovered clock source and buffer . The recovered clock of a transceiver channel can be buffered and driven out of the device. For an enabled transceiver channel, you can choose an available output buffer from the RXRECCLKOUT buffer column of the channel table, or by right-clicking the channel in the graphic. This feature requires using one of the available differential clock buffers within that transceiver’s Quad as an output, preventing that same resource from being used as a reference clock input buffer. Choosing a recovered clock source and buffer causes the channel’s recovered clock output to be routed to an instantiated output buffer primitive and the appropriate constraints to be generated.