Transmitter Flow-Control Inputs - 2.4 English - PG169

Integrated Interlaken 150G LogiCORE IP Product Guide (PG169)

Document ID
PG169
Release Date
2024-06-05
Version
2.4 English

The Integrated Interlaken IP core implements the Interlaken in-band flow control mechanism as described in section 5.3.4 of the Interlaken Protocol Definition, Revision 1.2, October 7, 2008. This mechanism communicates XON/XOFF (for example, for different channels) using the In-Band Flow Control bits of Control words. Additionally, the Multiple-Use bits of Control Words can be used in a similar manner.

Inside each Interlaken Control Word are 16 bits of In-Band Flow Control information, Bits[55:40], and a Reset Calendar bit, Bit[56]. These bits are shared over the calendar length as described in the following subsections. The Interlaken core has a fixed calendar length and provides one transmit bit and one receive bit for each calendar entry.

By definition, XON is represented by 1, and XOFF is represented by 0 for both the Transmitter and the Receiver. All signals are synchronous with the rising-edge of LBUS_CLK and a detailed description of each signal follows.