| Name | I/O | Description |
|---|---|---|
| Clocking and Resets | ||
| clk | I | All signals between the RX_OOBFC and the user logic are synchronized to the positive edge of clk. In typical applications, this clock should be tied to the same clock used to run the user-side interface of the Interlaken Core. In order for correct operation in the RX_OOBFC, the frequency of this clock must be at least 33% faster than the frequency of RX_FC_CLK. For example, if the frequency of RX_FC_CLK is 100 MHz, the frequency of clk must be at least 133 MHz. |
| reset | I | Active-High, asynchronous reset input. This signal is automatically synchronized to the appropriate clock domain by the RX_OOBFC. All circuits in the module are reset while this input is a value of 1. This signal must remain asserted until after several clock cycles on both the clk and RX_FC_CLK inputs. |
| User-Side Interface – RX_OOBFC Signals | ||
| rx_fc[MAX_CAL-1:0] | O | Output data bus to the user logic containing the flow control
information received by the RX_OOBFC. The width of the bus is set by
the MAX_CAL parameter. Bit 0 corresponds to channel 0, bit 1
corresponds to channel 1, and so on. Interlaken defines a value of 1
as XON and a value of 0 as XOFF. If the calendar length for the received flow control information has less than MAX_CAL entries, the unused bits are undefined and should be ignored. It is up to you to monitor this bus and take appropriate action as flow control information is changed. When an unhealthy interface status is received, as indicated by rx_intf_status being a value of 0, or an unhealthy lane status is received, as indicated by a bit of rx_lane_status being a value of 0, then all bits of rx_fc are XOFF or a value of 0. When a CRC error is detected, the outputs rx_fc are unchanged. This bus is synchronized to the positive edge of clk. |
| rx_crcerr | O | Indicates if an error was observed in the CRC field of the
incoming status or flow control information. A value of 1 indicates
a CRC error was detected. When this bit is a value of 1, the outputs
rx_fc, rx_intf_status, and rx_lane_status are not updated and can be
ignored. The cause of a CRC error can be due to clk not being
sufficiently faster than RX_FC_CLK as required for correct
operation. This signal is synchronized to the positive edge of clk. |
| rx_overflow | O | Indicates that clk is not faster than RX_FC_CLK as required for
correct operation. This signal is synchronized to the positive edge of clk. |
| rx_intf_status | O | Indicates the health of the receive interface as described in the
Interlaken specification. When this output has a value of 0, all
flow-control bits in the rx_fc bus will be XOFF (that is, 0). This signal is synchronized to the positive edge of clk. |
| rx_lane_status[11:0] | O | Indicates the health of the corresponding receive lanes as
described in the Interlaken specification. Bit 0 corresponds to lane
0, bit 1 corresponds to lane 1, and so on. When any bit of this bus
has a value of 0, all flow-control bits in the rx_fc bus will be
XOFF (that is, 0). This bus is synchronized to the positive edge of clk. |
| rx_update [31|15|7|3|1|0:0] | O | Indicates a valid CRC4 was detected and rx_fc bits were updated. If rx_update[0] is asserted, the CRC4 associated with rx_fc[63:0] was valid and rx_fc[63:0] were updated; if rx_update[1] is asserted, the CRC4 associated with rx_fc[127:64] was valid and rx_fc[127:64] were updated, and so on. This bus is synchronized to the positive edge of clk. |
| rx_callen_minus1[10|9|8|7:0] | O | Indicates the length of the most recently received calendar. This bus is synchronized to the positive edge of clk. |
| rx_force_xoff_if_crcerr | I | When this input is a value of 1, all bits of rx_fc are forced to XOFF if a CRC error is detected. |
| Device Interface – RX_OOBFC Signals 1 | ||
| RX_FC_CLK | I (LVCMOS) |
This the source-synchronous clock used by RX_OOBFC as defined by
the Interlaken protocol. This signal must be connected directly to a device input pin. |
| RX_FC_DATA | I (LVCMOS) |
The flow control information is received by the RX_OOBFC with
this signal as defined by the Interlaken protocol. This signal must be connected directly to a device input pin. |
| RX_FC_SYNC | I (LVCMOS) |
This signal is used to synchronize the received flow control
information as defined by the Interlaken Protocol. This signal must be connected directly to a device input pin. |
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