Interlaken Specific Checks - 2.4 English - PG169

Integrated Interlaken 150G LogiCORE IP Product Guide (PG169)

Document ID
PG169
Release Date
2024-06-05
Version
2.4 English
Many issues can commonly occur during the first hardware test of an integrated IP core for Interlaken. These should be checked as indicated below.

Proceed in the following sequence:

  1. Clean up signal integrity.
  2. Ensure that each SerDes achieves CDR lock.
  3. Check that each lane has achieved word alignment.
  4. Check that lane alignment has been achieved.
  5. Proceed to Interface Debug and Protocol Debug.