The following figure shows the general customization options for the IP.
Figure 1. General Tab
Parameter | Description | Default Value | Value Range |
---|---|---|---|
Physical Layer | |||
Line Rate | Line rate of the interface in Gb/s | 12.5 | 3.125 5 6.25 10.3125 12.5 25.78125 1 |
Lanes | Number of Lanes | 12 | 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12 |
Transceiver Type | Transceiver Type | GTH | GTH GTY |
GT Ref Clk | Reference Clock for the GTs used, in MHz. The default value is dependent on the transceiver configuration. | 195.3125 (GTH at 12.5 Gb/s) 402.832 (GTY at 25.78125 Gb/s) |
125.00 128.90 156.25 161.133 189.39 195.3125 201.41 250.00 257.81 312.50 322.26 386.71 390.62 402.832 |
Operation | Operating mode | Duplex | Duplex Simplex TX Simplex RX |
Clocking 2 | Clocking mode | Synchronous | Synchronous Asynchronous |
GT DRP/Init Clock | This specifies the frequency (in MHz) that is used to provide a free running clock to GT and also for the DRP operations. | 100 | Depends on the Line Rate used |
Link Layer | |||
RX Dataflow Mode 3 | Packet Mode | Packet mode | Packet Mode Burst Mode |
BurstMax | Burst Max in Bytes | 256 | 64 128 192 256 |
BurstShort 4 | Burst Short in Bytes | 64 | 64 96 128 160 192 224 256 |
Meta Frame | Meta Frame length in Interlaken words | 2,048 | 256 to 8,192 |
Channels | Number of Channels | 256 | 256 512 1,024 2,048 |
Flow Control | |||
Enable In-band flow control | In-band flow control | 0 | 0 – Disable 1 – Enable |
In-Band Calendar Length | Entries for calendar length | 256 | 16 32 64 128 256 |
Enable out-of-band flow control | Out-of-band flow control | 0 | 0 – Disable 1 – Enable |
Out-of-band Calendar Length | Entries for calendar length | 256 | 32 64 128 256 512 1,024 2,048 |
Additional Features | |||
Enable Protocol Bypass Mode | Enables Interlaken IP to operate in Protocol Bypass Mode | 0 | 0 – Disable 1 – Enable |
Disable Skipword | Used to provide clock compensation in the Meta Frames if intermediate electrical repeater functions are used | 1 | 0 – False 1 – True |
Include AXI4-Lite Control and Statistics Interface | When you enable, the AXI4-Lite interface is provided in the core | 0 | 0 – Disable 1 – Enable |
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