The following examples illustrate segmented LBUS cycles covering various combinations of SOP, Dat (data in the middle of a packet), EOP, and idle (no data on the bus). Valid and invalid cycles are shown.
The segmented LBUS is assumed to be 512 bits wide and each segment is 128 bits wide (16 bytes). The TX direction is illustrated. The RX direction has analogous behavior but there will be no invalid cycles on the receive segmented LBUS. Unlike the TX, the RX is able to transfer two packets in one cycle, for example, with two SOP and two EOP, due to the removal of overhead.
It is assumed that Packet Mode is being used.