The Integrated Interlaken IP core includes the ability to inject a bit error as recommended in section 2.6 of the Interlaken Retransmit Extension Protocol Definition, Revision 1.2, June 28, 2012.
This error injector forces a pseudo-random single bit error on the selected lane without regard for regular Control Words, Data Words, or Meta Frame Words. Consequently, the injected error might not necessarily result in a CRC24 error that will cause a request for retransmission.
When the RX is aligned, at least one of the following signals will indicate that a bit error was detected:
-
STAT_RX_CRC32_ERR -
STAT_RX_FRAMING_ERR -
STAT_RX_DESCRAM_ERR
For example, if a single bit error was injected on lane 3, at least one of:
-
STAT_RX_CRC32_ERR[3], or -
STAT_RX_FRAMING_ERR[3], or -
STAT_RX_DESCRAM_ERR[3]
On the RX will be asserted for a single clock cycle. Retransmission only occurs if a CRC24 error is detected in a regular Control or Data Word.
The following ports on the Interlaken core are associated with the single bit error injector feature:
-
CTL_TX_ERRINJ_BITERR_GO -
CTL_TX_ERRINJ_BITERR_DONE -
CTL_TX_ERRINJ_BITERR_LANE[3:0]
A lane is selected via CTL_TX_ERRINJ_BITERR_LANE.
CTL_TX_ERRINJ_BITERR_GO is asserted for a single clock cycle. When
CTL_TX_ERRINJ_BITERR_DONE is a value of 1 again, you can change the
value of CTL_TX_ERRINJ_BITERR_LANE and initiate another error with
CTL_TX_ERRINJ_BITERR_GO again.