The following figure shows how multiple instances of this core should be connected in a design so that clock resources can be saved using the shared logic feature.
Figure 1. Multiple Instances of GMII to RGMII Core in a Design
Both the core instances are configured for the GMII TX clock to be sourced internally.
For example, GMII_TO_RGMII_0, shared logic is in the core and for IP instance
GMII_to_RGMII_1, shared logic is in the example design (which means the IP block level
does not have any shared clock/reset resources). Instance GMII_TO_RGMII_0 generates all
the required clocks, namely ref_clk and the GMII TX clock. These clocks
are used by the instance GMII_TO_RGMII_0 internally and also shared with instance
GMII_TO_RGMII_1.