Top-Level Example Design HDL - Top-Level Example Design HDL - 4.1 English - PG160

GMII to RGMII v4.1 LogiCORE IP Product Guide (PG160)

Document ID
PG160
Release Date
2025-12-17
Version
4.1 English

VHDL AMD Vivado™ Design Suite:

<project_dir>/<project_name>/<project_name>.srcs/sources1/ip/
<component_name>/<component_name>/example_design/
<component_name>_example_design.vhd