These documents provide supplemental material useful with this guide:
- Zynq 7000 SoC Technical Reference Manual (UG585)
- IEEE std 802.3-2012 (http://standards.ieee.org/findstds/standard/802.3-2012.html)
- Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
- Reduced Gigabit Media Independent Interface (RGMII) Version documentation (www.hp.com/rnd/pdfs/RGMIIv2_0_final_hp.pdf)
- Vivado Design Suite User Guide: Designing with IP (UG896)
- Vivado Design Suite User Guide: Getting Started (UG910)
- ISE to Vivado Design Suite Migration Guide (UG911)
- Vivado Design Suite User Guide: Programming and Debugging (UG908)
- Vivado Design Suite User Guide: Logic Simulation (UG900)
- Vivado Design Suite User Guide: Implementation (UG904)
- Zynq UltraScale+ Device Technical Reference Manual (UG1085)
- Zynq 7000 SoC (Z-7007S, Z-7012S, Z-7014S, Z-7010, Z-7015, and Z-7020) Data Sheet: DC and AC Switching Characteristics (DS187)
- Zynq 7000 SoC (Z-7030, Z-7035, Z-7045, and Z-7100) Data Sheet: DC and AC Switching Characteristics (DS191)
- Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925)