Performance - Performance - 4.1 English - PG160

GMII to RGMII v4.1 LogiCORE IP Product Guide (PG160)

Document ID
PG160
Release Date
2025-12-17
Version
4.1 English

This section describes the performance of the GMII to RGMII core.

Maximum Frequencies

The GMII to RGMII core operates at 125 MHz. The Management module operates at 200/300/375 MHz.

Latency

The following measurements are for the core only and do not include any IOB registers.

Transmit Path
As measured from a data octet input into gmii_txd[7:0] of the transmitter side of the GMII interface until that data appears on the rgmii_txd[3:0] on the RGMII interface, the latency through the core through the transmit direction is one clock period of gmii_tx_clk_int.
Receive Path
Measured from a data octet input into rgmii_rxd[3:0] of the receiver side of the RGMII interface until that data appears on the gmii_rxd[7:0] on the GMII interface, the latency through the core through the receive direction is one clock period of rgmii_rx_clk, plus the additional delay equal to the fixed delay specified on the IDELAY component.

Throughput

The GMII to RGMII core operates at full line rates of 10/100/1000 Mb/s.

Power

No information is currently provided for this core.