MDIO Bus System - 4.1 English

GMII to RGMII Product Guide (PG160)

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4.1 English

The MDIO interface for 1 Gb/s operation (and slower speeds) is defined in IEEE 802.3-2012, clause 22. This Figure illustrates an example of MDIO bus system. This two-wire interface consists of a clock (MDC) and a shared serial data line (MDIO). The maximum permitted frequency of MDC is set at 2.5 MHz. An Ethernet MAC is shown as the MDIO bus master (the Station Management (STA) entity). Two PHY devices are shown connected to the same bus, both of which are MDIO slaves (MDIO Managed Device (MMD) entities).

Figure 2-4:      Typical MDIO Managed System

X-Ref Target - Figure 2-4



The MDIO bus system is a standardized interface for accessing the configuration and status registers of Ethernet PHY devices. In the example illustrated, the Management Host Bus I/F of the Ethernet MAC can access the configuration and status registers of two PHY devices through the MDIO bus.