Kintex UltraScale Devices Available GT Quads - 4.4 English - PG156

The following table shows the PCIe lane 0 GT Quad options available for the different AMD Kintex™ UltraScale™ devices. The GT Quad location is shown using the GT Quad bank number rather than GT XY coordinates. The UltraScale and UltraScale+ FPGAs Packaging and Pinouts Product Specification (UG575) provides a diagram describing the PCIe block locations relative to enabled GT Quads and includes both GT bank numbering and XY coordinates if needed.