Using the Dual Quad Mode - 3.2 English - PG153

AXI Quad SPI LogiCORE IP Product Guide (PG153)

Document ID
PG153
Release Date
2025-07-21
Version
3.2 English

The Enable Dual Quad Mode parameter is applicable only (AMD UltraScale™ and future devices) in following configuration of the IP core.

  • Master mode
  • STARTUP enabled
  • SPI mode is QUAD
  • Number of slaves is 2

When this parameter is enabled, the IP core has two SPI interfaces. IP is connected to two flashes/SPI slave devices as shown in the following figure.

Figure 1. Dual Quad Mode

Traffic to SPI slaves can be controlled using the slave select register (SPISSR).