Slave Device = Micron - Slave Device = Micron - 3.2 English - PG153

AXI Quad SPI LogiCORE IP Product Guide (PG153)
Document_ID
PG153
Release_Date
2026-01-16
Version
3.2 English
Table 1. SPI Command Core Behavior for Dual Mode and Winbond Memory
Command Type Winbond Memory Command Error Core Behavior
Standard SPI Supported No Standard format
Standard SPI Not supported Yes No SPI transaction
Dual mode Supported No Dual mode instruction format as given in the data sheet
Dual mode Not supported Yes No SPI transaction
Quad mode Supported Yes No SPI transaction
Quad mode Not supported Yes No SPI transaction
  1. The core is designed to support Winbond W25Q64BV memory. See the device data sheet for the command, address, dummy bytes and data bytes required for each command and for the command, address and data bits operating details.

This is a dedicated mode and supports only Micron memories as SPI slave devices. The core supports most of the dual and standard Micron memory SPI commands. Tje shows the core behavior.

Table 2. SPI Command Core Behavior for Dual Mode and Micron Memory
Command Type Micron Memory Command Error Core Behavior
Standard SPI Supported No Standard format
Standard SPI Not supported Yes No SPI transaction
Dual mode Supported No Dual mode instruction format as given in the data sheet
Dual mode Not supported Yes No SPI transaction
Quad mode Supported Yes No SPI transaction
Quad mode Not supported Yes No SPI transaction
  1. The core is designed to support the Micron N25Q256-3V memory in this mode for all dual and standard mode commands. See the device data sheet for the command, address, dummy bytes and data bytes required for each command and for the command, address and data bits operating details.