- Disable the master transaction by asserting the master inhibit bit of SPICR (60h), and reset the RX and TX FIFOs through SPICR.
- Issue the read data command into SPIDTR to read data from any specific sector followed by the flash sector address.
- Fill SPIDTR with the dummy data to read required data from the flash.
- Issue chip select by writing 0x00 to SPISSR (70h).
- Enable master transaction by deasserting the SPICR master inhibit bit.
- Deassert chip select by writing 0x01 to SPISSR.
- Disable master transaction by asserting SPICR master inhibit bit
- Read SPIDRR, to get the Read data that is received from the SPI bus.
- Refer to the respective SPI slave (flash) data sheet to know which commands to issue.
- Write/Read commands vary with respect to the mode (Standard/Dual/Quad) used.