Performance - 3.2 English - PG153

AXI Quad SPI LogiCORE IP Product Guide (PG153)

Document ID
PG153
Release Date
2026-01-16
Version
3.2 English

For full details about performance and resource utilization, visit the Performance and Resource Utilization web page.

The performance characterization of this core was compiled using the margin system methodology. The details of the margin system characterization methodology are described in the Vivado Design Suite User Guide: Designing with IP (UG896).

  • AMD Artix™ 7
  • AMD Kintex™ 7
  • AMD Virtex™ 7
  • AMD Kintex™ UltraScale™
  • AMD Virtex™ UltraScale™
  • AMD Zynq™ 7000
  • AMD Kintex™ UltraScale+™
  • AMD Virtex™ UltraScale+™
  • AMD Zynq™ UltraScale+™ MPSoCs
  • AMD Versal™ AI Core devices

The maximum frequencies for the AXI Quad SPI core are shown in the following table.

Table 1. AXI Quad SPI Maximum Frequencies
Family Speed Grade ext_spi_clk

(with STARTUP)

ext_spi_clk

(without STARTUP)

Virtex 7 -1 128 115
-2 125 135
-3 126 140
Kintex 7 -1 126 125
-2 128 150
-3 125 160
Artix 7 -1 184 145
-2 185 155
-3 185 160
Kintex UltraScale -1 320 160
-2 415 165
-3 460 175
Virtex UltraScale -1 365 150
-2 400 155
-3 500 170
Zynq 7000 -1 180 135
-2 185 150
-3 185 160
Virtex UltraScale+ -1 50 145
-2 60 140
-3 75 160
Kintex UltraScale+ -1 55 125
-2 65 125
-3 75 125
Zynq UltraScale+ MPSoCs -1 55 150
-2 65 155
-3 75 165
Versal AI Core Series -1LP STARTUP option not available 100
-2LP STARTUP option not available 110
-2MP STARTUP option not available 105
  1. For xip and standard modes, ext_spi_clk might be limited to 60 MHz.
  2. The frequencies mentioned in this table are specific to SPI Quad mode. They vary if the mode and other settings are changed.