Transpose Multiply-Accumulate - 7.2 English - PG149

FIR Compiler LogiCORE IP Product Guide ( PG149)

Document ID
PG149
Release Date
2025-06-11
Version
7.2 English

The following figure shows the Transpose Multiply-Accumulate architecture implementing a Transposed Direct-Form filter.

Figure 1. Transpose Direct - Form

The following figure shows a multi-MAC implementation for this architecture.

Figure 2. Transpose Multi - MAC Implementation

This architecture is also directly supported by the DSP Slice. This structure offers a low latency implementation, and for some configurations can also offer extra resource savings over the Systolic structure. It does not require an accumulator and can use fewer data memory resources, although it does not exploit coefficient symmetry.