- Hardware Oversampling Specification format
- Selects which method is used to specify the hardware oversampling rate and determines the level of control and rate abstraction used by the core. This value directly affects the level of parallelism of the core implementation and resources used.
When Maximum Possible is selected, the
core uses the maximum oversampling given the sample period of the signal connected
to s_data_tdata port. The s_data_tvalid handshake signal is abstracted and automatically driven
by System Generator and the core propagates the data
streams sample period.
When Hardware Oversampling Rate is selected, you can specify the oversampling rate relative to the input sample period of the core. As with Maximum Possible the handshake and sample period are managed automatically by System Generator.
When Input or Output Sample Period is selected,
there is no automatic handshaking, so s_data_tvalid
is exposed, nor is there rate abstraction, so all core ports are considered to have
a normalized sample period 1. The core clock is connected to the system clock. The
core must be controlled using the AXI4-Stream
protocol (see AXI4-Stream Interfaces).
- Sample Period
- Specifies the input or output sample period supported by the core. A sample frequency greater than the clock frequency can be specified using a fractional sample period (see Super Sample Rate Filters).
- Hardware Oversampling Rate
- Specifies the hardware oversampling rate to be applied to the core.
See Filter Options Tab for information about the other parameters on this tab.