Summary (Two Pages) - Summary (Two Pages) - 6.0 English - PG141

DDS Compiler LogiCORE IP Product Guide (PG141)

Document_ID
PG141
Release_Date
2024-12-11
Version
6.0 English

The final two tabs provide feedback fields.

Summary (Page 1)
This page presents the resolved values of the selected part. For instance, these fields indicate the result of automatic memory type and latency allocation. They also indicate the expected SFDR and frequency resolution for the DDS when hardware parameters are used for input, or vice versa. There are also resource estimates (DSP slices and 18 Kb block RAM primitives).
Summary (Page 2)
This page is only presented when Phase Increment and/or Phase Offset are fixed or programmable, and provides a summary of the hexadecimal values used to obtain a particular frequency or phase offset. The actual value of frequency and phase (the latter as a fraction of a cycle) is also given as a floating-point number.