Phase Increment - Phase Increment - 6.0 English - PG141

For standard mode, phase increment values in the range 0 to 2^N-1 describes the range [0,360]° (where N is the number of bits in the phase accumulator). For rasterized mode, phase increment values must be considered unsigned due to the internal implementation. The phase increment values [0 to Modulus-1] describe the range [0,360].

The phase increment term Δθ defines the synthesizer output frequency. Consider a standard DDS with the following parameterization:

To generate a sinusoid with frequency f_out = 19 MHz, the required phase increment is:

This value must be truncated to an integer giving the following actual frequency:

Consider a DDS in rasterized mode with the following parameterization:

• F_clk = 100 MHz
• M (Modulus) = 1536

To generate a sinusoid with frequency f_out = 19 MHz, the required phase increment is:

The closest integer value to this is 292, giving the following actual frequency: