The conversion to AXI4-Stream interfaces
brings standardization and enhances interoperability of AMD IP LogiCORE solutions. Other than general control
signals such as aclk, aclken and aresetn, and event signals, all
inputs and outputs to the CIC Compiler core are conveyed using AXI4-Stream channels. A channel always consists of TVALID and TDATA plus
additional ports (such as TREADY, TUSER and TLAST) when required and optional fields.
Together, TVALID and TREADY perform a handshake to transfer a message, where the payload
is TDATA, TUSER and TLAST.
For further details on AXI4-Stream interfaces, refer to the Vivado Design Suite: AXI Reference Guide (UG1037).