- AXI4-Stream-compliant interfaces
- Decimation or interpolation
- Fixed or programmable rate change from 4 to 8192
- Three to six CIC stages
- One or two differential delays
- Support of signed two's-complement input data from 2 bits to 32 bits
- Full or limited precision output data
- Single or multichannel support for up to 16 channels
- Hardware folding for small-footprint implementations
- Optional mapping to DSP48E1 slices
- Synchronous clear input
- Clock enable input
- Use with AMD Vivado™ IP catalog and AMD System Generator for DSP