Configuration Channel - Configuration Channel - 4.0 English - PG140

CIC Compiler v4.0 LogiCORE IP Product Guide (PG140)

Document_ID
PG140
Release_Date
2026-07-22
Version
4.0 English

This channel is only present in programmable rate configurations.

Pinout

The configuration channel pinout is shown in the following table.

Table 1. Configuration Channel Pinout
Port Name Port Width Direction Description
s_axis_config_tdata Variable 1 In Carries the configuration information: RATE
s_axis_config_tvalid 1 In Asserted by the external master to signal that it is able to provide data.
s_axis_config_tready 1 Out Asserted by the CIC Compiler to signal that it is able to accept data.
  1. Range can be viewed in the Vivado IDE.

TDATA Fields

The configuration channel (s_axis_config) is an AXI4 channel that carries the fields shown in the following table in its TDATA vector.

Table 2. Configuration Channel TDATA Fields
Field Name Width Padded Description
RATE log2(maximum rate + 1) Yes The interpolation or decimation rate of the core.

The RATE field needs to be extended to the next 8-bit boundary if it does not already finish on an 8-bit boundary. The CIC Compiler core ignores the value of the padding bits, so they can be driven to any value. Connecting them to constant values can help reduce device resource usage.

TDATA Format

The configuration channel has one field which is packed into the s_axis_config_tdata vector as shown in the following figure (starting from the LSB):

Figure 1. Configuration Channel TDATA (s_axis_config_tdata) Format