The captured timestamp will always be presented out-of-band with TEMAC frame reception using a dedicated AXI4-Stream interface. The signal definition for this is defined in the following table.
A timing diagram showing the operation of this interface follows the table. To summarize, the timestamp will be valid on the same clock cycle as the first data word of frame data. This AXI4-Stream interface is synchronous to the TEMAC receive clock.
Name | Direction | Description |
---|---|---|
rx_ts_axis_tdata[127:0] | Out |
AXI4-Stream Receive Timestamp from the TEMAC. Bits[127:80] - Reserved Bits [79:32] - Captured Timestamp Seconds field Bits [31:0] - Captured Timestamp Nano-seconds field |
rx_ts_axis_tvalid | Out | AXI4-Stream Receive Timestamp Data Valid from the MAC |
Figure 1. AXI4-Stream Interface Timing – Receive Timestamp