- Support for MII, GMII, RGMII, SGMII, and
1000BASE-X PHY interfaces Support for 1000BASE-X and SGMII over Select
Input/Output (I/O) Low Voltage Differential Signaling (LVDS) for AMD UltraScale™
/AMD UltraScale+™
.
- For AMD
Versal Adaptive SoC, LVDS support both Async and
Sync mode, is integrated with Advanced I/O Wizard, whereas for the AMD
Versal Adaptive SoC Gen 2, the Sync mode LVDS support is
integrated with X5IO Wizard but Async mode is not supported in the X5IO Wiz, so
it is not enabled in the AXI Ethernet IP.
- Support for pause frames for flow
control
- Media Independent Interface
Management (also called MII), is used for accessing the PHY registers
- Ethernet Audio Video Bridging (AVB)
support
-
AXI4-Stream transmit/receive interface
- Support for 2.5G Ethernet. This feature is
enabled for the following devices:
-
AMD Kintex™ 7, AMD Virtex™ 7 with GTH and GTX
transceivers
-
AMD
Artix™
7 devices with GTP and speed grade -2,
-2L, and -3
-
UltraScale, UltraScale+
devices with GTH and GTY transceivers, Versal Adaptive SoC with GTY/GTYP transceivers
- IEEE Standard 1588 support
-
AXI4-Lite register interface