When you enable the Transceiver Control user parameter, the Ethernet Transceiver Debug Interface contains the DRP interface, DRP clock, and the Transceiver Debug interface. When IEEE 1588 mode is enabled, the Ethernet Transceiver Debug Interface contains only a transceiver interface. For detailed information on the signals and clock frequency information, see the 1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047).
| Name | Mode | Description |
|---|---|---|
| transceiver_debug | master | This interface contains transceiver debug signals. |
| gt_drp | slave | This interface contains DRP signals. |
| drp_clk | In | This is a DRP interface clock. |