Ethernet MII Management Interface - 7.2 English - PG138

AXI 1G/2.5G Ethernet Subsystem Product Guide (PG138)

Document ID
PG138
Release Date
2024-06-05
Version
7.2 English

The Ethernet MII management interface signal ports are described in the following table.

Table 1. Ethernet MII Management Interface (MIIM) Ports
Signal Name Direction Initial Status Description
mdc Out 0 TEMAC to PHY MII management bus clock.
mdio In/Out 1 3-stateable bidirectional MII Management data bus. If the MDIO interface of AXI Ethernet is not used, the MDIO_I signal must be tied High to allow MDIO communication to the internal Ethernet MAC. In all modes, individual mdio_i (input) mdio_o (output) and mdio_t (3-state enable) signals are provided.