Write Command Issuing Latency - 3.0 English

AXI Traffic Generator LogiCORE IP Product Guide (PG125)

Document ID
PG125
Release Date
2023-10-18
Version
3.0 English

Latency is calculated from the point where the core is enabled by writing to the Master Control register and the awvalid assertion on Master Ports. Latency is nine clock cycles with delay parameters in PARAMRAM set to zero.

Figure 1. Write Command Issuing Latency