Test Bench - 3.0 English

AXI Traffic Generator LogiCORE IP Product Guide (PG125)

Document ID
PG125
Release Date
2023-10-18
Version
3.0 English

This chapter contains information about the test bench provided in the AMD Vivado™ Design Suite.

The following figure shows the test bench for the AXI Traffic Generator example design. The top-level test bench generates a 100 MHz clock, external start/stop triggers pulses based on the mode, and drives an initial reset to the example design.

Figure 1. AXI Traffic Generator Example Design Test Bench
Page-1 Box.2 DUT DUT Box.6 Box.4 Clock, Reset, and External Trigger Generation Clock, Reset, and External Trigger Generation Sheet.6 <componentname>_tb_top.v (top_tb) <componentname>_tb_top.v (top_tb) Sheet.7 s_axi_aresetn s_axi_areset Sheet.8 s_axi_aclk s_axi_aclk_ps_axi_aclk_n Sheet.9 done done Sheet.10 status status Sheet.11 core_ext_start core_ext_start Sheet.12 core_ext_stop core_ext_stop Sheet.13 Sheet.14 Sheet.15 Sheet.16 Sheet.17 Sheet.18 Box.10 Test Status Test Status