Streaming Config - 3.0 English

AXI Traffic Generator LogiCORE IP Product Guide (PG125)

Document ID
Release Date
3.0 English

Streaming Config register allows you to configure the Streaming master interface for programmable delays or random delay in transfer length and TDEST value. This register is only available in the Streaming mode of operation.

Table 1. Streaming Config (0x34)
Bits Name Reset Value Access Type Description
31:16 PDLY 0x0 R/W Programmable delay (in clocks) between two streaming packets.
15:8 TDEST 0x0 R/W Value to drive on TDEST port.
7:3 Reserved N/A N/A Reserved
2 ETKTS 0x0 R/W

Enable User TSTRB/TKEEP Setting

When set, core places your specified STRB/KEEP value on the last beat of the transfer.

When this bit is 0, core places internally generated STRB/KEEP value on the last beat of the transfer.

You need to set Support Sparse Strobe Keep along with this bit to generate sparse STRB/KEEP values.

1 RANDLY 0x0 R/W

Enable Random Delay

When set, generates random delay between streaming transactions. For example, from TLAST to next TVALID.

0 RANLEN 0x1 R/W

Enable Random Length

When set, generates streaming transactions with random length. When this bit is 0, core generates the streaming transaction with the length specified in Transfer Length register