Static Mode Options - 3.0 English

AXI Traffic Generator LogiCORE IP Product Guide (PG125)

Document ID
PG125
Release Date
2023-10-18
Version
3.0 English
Channel Select
Selects desired channel on which traffic to be generated.
Enable Address Sweep
When enabled, the address sweeps across the specified Base and High address.
Write Base Address
Base/starting address for write transactions. This has to be configured based on the available memory slaves in the system.
Write High Address
Only used when Address sweep is enabled. Write transactions generated are between Base and High address, This has to be configured based on available memory slaves in the system.
Read Base Address
Base/starting address for read transactions. This has to be configured based on the available memory slaves in the system.
Read High Address
Only used when Address sweep is enabled, Read transactions generated are between Base and High address, This has to be configured based on available memory slaves in the system.
Write Base Address (MSB)
MSB bits of base/starting address for write transactions. This has to be configured based on the available memory slaves in the system and it is only applicable when the address width is > 32.
Write High Address (MSB)
MSB bits are only used when address sweep is enabled. Write transactions generated are between base and high address, Only applicable when the address width is > 32.
Read Base Address (MSB)
MSB bits of base/starting address for read transactions. This has to be configured based on the available memory slaves in the system and it is only applicable when the address width is > 32.
Read High Address (MSB)
MSB bits are only used when address sweep is enabled, Read transactions generated are between base and high address, Only applicable when address width is > 32.
Note: Though the Vivado IDE allows a complete 32-bit value for *(MSB) parameters, only the applicable bits (determined based on the address width configured) are considered and driven on the address ports.
Burst Length
Burst length for read/write transactions.