Read Command Issuing Latency - 3.0 English

AXI Traffic Generator LogiCORE IP Product Guide (PG125)

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3.0 English

Latency is calculated from the point where the core is enabled by writing to the Master Control register and the arvalid assertion on Master Ports. Latency is nine clock cycles with delay parameters in PARAMRAM set to zero.

Figure 1. Read Command Issuing Latency