Operation - 3.0 English - PG125

AXI Traffic Generator LogiCORE IP Product Guide (PG125)
Document ID
PG125
Release Date
2023-10-18
Version
3.0 English
  1. After AXI Traffic Generator (ATG) comes out of reset, it reads the ADDR and DATA ROMs.
  2. It initiates AXI4-Lite write transactions to a specified address and data in the COE files.
  3. The core goes to an idle state after AXI4-Lite transactions are issued.

The following figure shows the example use case where ATG (System Init mode) is used to initialize peripherals in a system without a processor.

Figure 1. System Init Mode Block Diagram
Page-1 Page-1 Box ATG ATG Box.2 AXI Interconnect AXI Interconnect Box.3 Peripheral #1 Peripheral #1 Box.4 Peripheral #2 Peripheral #2 Box.5 Peripheral #16 Peripheral #16 Arrow Sm Right Arrow Sm Right.7 Arrow Sm Right.8 Arrow Sm Right.9 Arrow Sm Right.10 Sheet.13 Sheet.14

The number of entries in the COE file is user-programmable. Allowed values are 16, 32, 64, 128, and 256. You can insert NOP (No Operation) defined by address (0xFFFFFFFF) in the middle of a COE address file. The core stops generating further transactions (including the current NOP address of 0xFFFFFFFF) after the NOP address is present. You need to ensure at least one NOP address is present in the address COE file.

System Test mode is an enhancement to the System Init mode with support to generate read transactions. This mode also allows you to write test applications using Traffic Generator supported micro-commands with the help of the additional COE files Control and Mask. Completion and status of the core operation are reported through done and status ports.

Table 1. Control COE File – 32-bit Control information
Bits Description
31:18 Reserved. Must be filled to zeros.
17

Count as Error

Checks the status of the transaction.

For Write: BRESP is monitored to be OKAY.

For Read: RDATA compared against the entry in Data COE File.

0 = check the BRESP/RDATA and do not increment error counter

1 = check the BRESP/RDATA and increment error counter
16

0 = read transaction

1 = write transaction
15:8 Next COE entry to be fetched upon successful completion of the current transaction.
7:0 Next COE entry to be fetched if the current transaction failed.
  • Mask COE file represents the bits to mask before comparing the read data versus expected data. For write transactions, these bits are ignored by the IP.
  • Mask bit value of 1 indicates the corresponding bit is used for comparing incoming read data with expected data.
  • Mask bit value of 0 indicates the corresponding bit is not used for comparing incoming read data with expected data.