Example Design - 3.0 English

AXI Traffic Generator LogiCORE IP Product Guide (PG125)

Document ID
PG125
Release Date
2023-10-18
Version
3.0 English

This chapter contains information about the example design provided in the AMD Vivado™ Design Suite.

The top module instantiates all components of the core and example design that are needed to implement the design in hardware, as shown in the following figure. This includes the driver, responder, and monitor modules.

Figure 1. AXI Traffic Generator Example Design Block Diagram

This example design demonstrates the transactions on AXI4 and AXI4-Stream interfaces of the Device Under Test (DUT) based on the mode in which the DUT is configured.

Driver
AXI Traffic Generator in System Test is used as a Driver to configure the DUT and checks for the pass/fail condition.
Responder
AXI block RAM (BRAM) Controller is used to respond to AXI4 transactions generated by the DUT in the applicable modes.
Monitor
AXI Performance Monitor is used to monitor the AXI4 transactions generated by the DUT in High Level Traffic modes.