MSTRAM is organized as 64-bit wide, 1024-deep memory. For data widths 32 and 64, the data from MSTRAM is sent to corresponding modules without any truncation/expansion in data width.
To save multiple RAM instances in data widths > 64, the same 64-bit data is duplicated/truncated based on the current data width selection of master channels.
The following example uses a data width of 128:
- During read access from the master write
block,
wdata_m[127:0] = 2{read_data_from_mstram[63:0]}
That is, 64-bit data is duplicated on the write-data bus to make it 128-bits wide.
- During write access by master read block,
write_data_to_mastram[63:0] = rdata_m[63:0]
That is, lower 64-bits of read data bus are stored in MSTRAM.
For data width of 256:
- During read access from the master write block,
wdata_m[255:0] = 4{read_data_from_mstram[63:0]}
That is, 64-bit data is duplicated on the write-data bus to make it 256-bits wide.
- During write access by master read block,
write_data_to_mastram[63:0] = rdata_m[63:0]
That is, lower 64-bits of read data bus are stored in MSTRAM.