The following table is available only in AXI4 Advanced and Basic mode. For any other mode, these registers are not accessible.
| Offset | Register Name | Description |
|---|---|---|
| 0x00 | Master Control | To control master logic. |
| 0x04 | Slave Control | To control slave logic. |
| 0x08 | Error Status | Different errors reported during core operation. |
| 0x0C | Error Enable | Enable register to report intended error. |
| 0x10 | Master Error Interrupt Enable | To generate/mask external error interrupt. |
| 0x14 | Config Status | Stores the current configuration of the core. |
| 0x18 to 0x2C | Reserved | Reserved |
| 0xB4 | Slave Error | Access to this register returns the SLVERR response. |