Address Width - 3.0 English

AXI Traffic Generator LogiCORE IP Product Guide (PG125)

Document ID
PG125
Release Date
2023-10-18
Version
3.0 English

This parameter determines the width of the read/write address ports on the Master AXI4 interface in the AXI4 mode of operation.

Note: In earlier versions, this value was fixed to 32.