Local Memory Bus (LMB) v3.0 LogiCORE IP Product Guide (PG113) - 3.0 English - The Local Memory Bus (LMB) IP core is used as the LMB interconnect for Xilinx device embedded processor systems. The LMB is a fast, local bus for connecting the MicroBlaze processor instruction and data ports to high-speed peripherals, primarily on-chip block RAM (BRAM). - PG113
- Document ID
- PG113
- Release Date
- 2025-12-17
- Version
- 3.0 English